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Biplex, pipelined FFTA method of implementing a pipelined fast Fourier transform (FFT) is presented that makes full use of the elements that comprise it. For a given bandwidth and spectral resolution, this approach requires 25 percent less memory, and needs only half the logic speed required for the conventional implementation. Since the spectrum is broken into two parts, two analog-to-digital converters, and attendant mixer-filters, are needed. These two input elements need only operate at half the speed of the one they replaced.
Document ID
19760022238
Acquisition Source
Legacy CDMS
Document Type
Other
Authors
Emerson, R. F.
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Date Acquired
August 8, 2013
Publication Date
August 15, 1976
Publication Information
Publication: The Deep Space Network
Subject Category
Computer Operations And Hardware
Accession Number
76N29326
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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