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Digital design of general LC structuresIn this paper the concept of a generalized delay is introduced and a method is developed for delay-free canonical digital realization of an arbitary reactance function. This method is an alternative approach and a generalization to the problem of digital realization of LC ladder structures.
Document ID
19780055256
Acquisition Source
Legacy CDMS
Document Type
Reprint (Version printed in journal)
Authors
Erfani, S.
(National University of Iran, Teheran, Iran, United States)
Peikari, B.
(Southern Methodist University Dallas, Tex., United States)
Date Acquired
August 9, 2013
Publication Date
May 1, 1978
Publication Information
Publication: IEEE Transactions on Circuits and Systems
Volume: CAS-25
Subject Category
Electronics And Electrical Engineering
Accession Number
78A39165
Funding Number(s)
CONTRACT_GRANT: NGL-44-007-006
Distribution Limits
Public
Copyright
Other

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