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Test chips for custom ICs - Six kinds of test structuresMicroelectronic test chips contain a number of test structures that are used for a variety of purposes in fabricating integrated circuits. For convenience, their use is divided into six groups: layout-rule evaluating, process-parameter extraction, device-parameter extraction, circuit-parameter extraction, initial-fabrication failure analysis, and reliability failure analysis. A given test structure can be used to gather information in a number of these groups. Examples are given here of the kinds of parameters that can be obtained in each of these groups. A table is included summarizing various device failures common to bulk CMOS and indicating failure mechanisms appearing after wafer fabrication and after stress.
Document ID
19830030606
Acquisition Source
Legacy CDMS
Document Type
Reprint (Version printed in journal)
Authors
Buehler, M. G.
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Griswold, T. W.
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Pina, C. A.
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Timoc, C.
(California Institute of Technology, Jet Propulsion Laboratory, Pasadena CA, United States)
Date Acquired
August 11, 2013
Publication Date
June 1, 1982
Publication Information
Publication: Circuits Manufacturing
Subject Category
Electronics And Electrical Engineering
Accession Number
83A11824
Distribution Limits
Public
Copyright
Other

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