A fast microprocessor communication network design for interprocessor communications for an integrated flight control systemA node design with connectivity four is presented whose communication processor handles data at four million bits/sec on each of the four channels into the node, and on each of the four channels out of the node, for a total node capacity of 32 million bits/sec. An integrated flight control system real-time application of this communication network design is discussed. It is shown that such high speed node communication hardware, arranged in the topological configuration of a minimum diameter graph with connectivity four and all links active, has good potential for real time control applications requiring reliability, availability, and survivability characteristics.
Document ID
19830030684
Acquisition Source
Legacy CDMS
Document Type
Conference Proceedings
Authors
Kelly, G. L. (Kansas Univ. Lawrence, KS, United States)
Jiang, P.-W. (Kansas, University Lawrence, KS, United States)
Date Acquired
August 11, 2013
Publication Date
January 1, 1982
Subject Category
Aircraft Communications And Navigation
Meeting Information
Meeting: Mini and microcomputers in control and measurement; International Symposium