Finite element computation with parallel VLSIThis paper describes a parallel processing computer consisting of a 16-bit microcomputer as a master processor which controls and coordinates the activities of 8086/8087 VLSI chip set slave processors working in parallel. The hardware is inexpensive and can be flexibly configured and programmed to perform various functions. This makes it a useful research tool for the development of, and experimentation with parallel mathematical algorithms. Application of the hardware to computational tasks involved in the finite element analysis method is demonstrated by the generation and assembly of beam finite element stiffness matrices. A number of possible schemes for the implementation of N-elements on N- or n-processors (N is greater than n) are described, and the speedup factors of their time consumption are determined as a function of the number of available parallel processors.
Document ID
19830055502
Acquisition Source
Legacy CDMS
Document Type
Conference Paper
Authors
Mcgregor, J. (Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Salama, M. (California Institute of Technology, Jet Propulsion Laboratory, Pasadena CA, United States)