NASA Logo

NTRS

NTRS - NASA Technical Reports Server

Back to Results
Modeling of single-event upset in bipolar integrated circuitsThe results of work done on the quantitative characterization of single-event upset (SEU) in bipolar random-access memories (RAMs) have been obtained through computer simulation of SEU in RAM cells that contain circuit models for bipolar transistors. The models include current generators that emulate the charge collected from ion tracks. The computer simulation results are compared with test data obtained from a RAM in a bipolar microprocessor chip. This methodology is applicable to other bipolar integrated circuit constructions in addition to RAM cells.
Document ID
19840037948
Acquisition Source
Legacy CDMS
Document Type
Reprint (Version printed in journal)
Authors
Zoutendyk, J. A.
(California Institute of Technology, Jet Propulsion Laboratory, Pasadena CA, United States)
Date Acquired
August 12, 2013
Publication Date
December 1, 1983
Publication Information
Publication: IEEE Transactions on Nuclear Science
Volume: NS-30
ISSN: 0018-9499
Subject Category
Electronics And Electrical Engineering
Accession Number
84A20735
Distribution Limits
Public
Copyright
Other

Available Downloads

There are no available downloads for this record.
No Preview Available