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Designing Test Chips for Custom Integrated CircuitsCollection of design and testing procedures partly automates development of built-in test chips for CMOS integrated circuits. Testchip methodology intended especially for users of custom integratedcircuit wafers. Test-Chip Designs and Testing Procedures (including datareduction procedures) generated automatically by computer from programed design and testing rules and from information supplied by user.
Document ID
19850000032
Acquisition Source
Legacy CDMS
Document Type
Other - NASA Tech Brief
Authors
Buehler, M. G.
(CALTECH)
Griswold, T. W.
(CALTECH)
Pina, C. A.
(CALTECH)
Timoc, C. C.
(CALTECH)
Date Acquired
August 12, 2013
Publication Date
June 1, 1985
Publication Information
Publication: NASA Tech Briefs
Volume: 9
Issue: 1
ISSN: 0145-319X
Subject Category
Electronic Systems
Report/Patent Number
NPO-15988
Accession Number
85B10032
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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