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Experimental Parallel-Processing ComputerMaster processor supervises slave processors, each with its own memory. Computer with parallel processing serves as inexpensive tool for experimentation with parallel mathematical algorithms. Speed enhancement obtained depends on both nature of problem and structure of algorithm used. In parallel-processing architecture, "bank select" and control signals determine which one, if any, of N slave processor memories accessible to master processor at any given moment. When so selected, slave memory operates as part of master computer memory. When not selected, slave memory operates independently of main memory. Slave processors communicate with each other via input/output bus.
Document ID
19850000302
Acquisition Source
Legacy CDMS
Document Type
Other - NASA Tech Brief
Authors
Mcgregor, J. W.
(Caltech)
Salama, M. A.
(Caltech)
Date Acquired
August 12, 2013
Publication Date
January 1, 1986
Publication Information
Publication: NASA Tech Briefs
Volume: 9
Issue: 3
ISSN: 0145-319X
Subject Category
Electronic Systems
Report/Patent Number
NPO-16043
Accession Number
85B10302
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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