Electronic device aspects of neural network memoriesThe basic issues related to the electronic implementation of the neural network model (NNM) for content addressable memories are examined. A brief introduction to the principles of the NNM is followed by an analysis of the information storage of the neural network in the form of a binary connection matrix and the recall capability of such matrix memories based on a hardware simulation study. In addition, materials and device architecture issues involved in the future realization of such networks in VLSI-compatible ultrahigh-density memories are considered. A possible space application of such devices would be in the area of large-scale information storage without mechanical devices.
Document ID
19860026685
Acquisition Source
Legacy CDMS
Document Type
Conference Paper
Authors
Lambe, J. (Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Moopenn, A. (Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Thakoor, A. P. (California Institute of Technology Jet Propulsion Laboratory, Pasadena, United States)