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Vector computer memory bank contentionA number of vector supercomputers feature very large memories. Unfortunately the large capacity memory chips that are used in these computers are much slower than the fast central processing unit (CPU) circuitry. As a result, memory bank reservation times (in CPU ticks) are much longer than on previous generations of computers. A consequence of these long reservation times is that memory bank contention is sharply increased, resulting in significantly lowered performance rates. The phenomenon of memory bank contention in vector computers is analyzed using both a Markov chain model and a Monte Carlo simulation program. The results of this analysis indicate that future generations of supercomputers must either employ much faster memory chips or else feature very large numbers of independent memory banks.
Document ID
19870044387
Acquisition Source
Legacy CDMS
Document Type
Reprint (Version printed in journal)
Authors
Bailey, David H.
(NASA Ames Research Center Moffett Field, CA, United States)
Date Acquired
August 13, 2013
Publication Date
March 1, 1987
Publication Information
Publication: IEEE Transactions on Computers
Volume: C-36
ISSN: 0018-9340
Subject Category
Computer Operations And Hardware
Accession Number
87A31661
Funding Number(s)
CONTRACT_GRANT: NAS2-11555
Distribution Limits
Public
Copyright
Other

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