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Integrated Circuit For Simulation Of Neural NetworkBallast resistors deposited on top of circuit structure. Cascadable, programmable binary connection matrix fabricated in VLSI form as basic building block for assembly of like units into content-addressable electronic memory matrices operating somewhat like networks of neurons. Connections formed during storage of data, and data recalled from memory by prompting matrix with approximate or partly erroneous signals. Redundancy in pattern of connections causes matrix to respond with correct stored data.
Document ID
19880000013
Acquisition Source
Legacy CDMS
Document Type
Other - NASA Tech Brief
Authors
Thakoor, Anilkumar P.
(Caltech)
Moopenn, Alexander W.
(Caltech)
Khanna, Satish K.
(Caltech)
Date Acquired
August 13, 2013
Publication Date
January 1, 1988
Publication Information
Publication: NASA Tech Briefs
Volume: 12
Issue: 1
ISSN: 0145-319X
Subject Category
Electronic Components And Circuits
Report/Patent Number
NPO-17059
Accession Number
88B10013
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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