NASA Logo

NTRS

NTRS - NASA Technical Reports Server

Back to Results
High-Speed Multiprocessing For Engine SimulationParallel microprocessors have computational power and speed for realistic simulations. Interactive information bus links front-end processor and computational processors. Real-time information bus links real-time extension processor and pre-processors. Computational processor and preprocessor communicate through shared memory. System used to simulate small turboshaft engine to demonstrate potential of multiprocessing in such applications. Real-time simulations aid development of new digital engine controls enabling testing of hardware and software under realistic conditions.
Document ID
19880000405
Acquisition Source
Legacy CDMS
Document Type
Other - NASA Tech Brief
Authors
Milner, Edward J.
(NASA Lewis Research Center, Cleveland, Ohio.)
Arpasi, Dale J.
(NASA Lewis Research Center, Cleveland, Ohio.)
Date Acquired
August 13, 2013
Publication Date
September 1, 1988
Publication Information
Publication: NASA Tech Briefs
Volume: 12
Issue: 8
ISSN: 0145-319X
Subject Category
Electronic Systems
Report/Patent Number
LEW-14593
Accession Number
88B10405
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

Available Downloads

There are no available downloads for this record.
No Preview Available