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Room-temperature codeposition growth technique for pinhole reduction in epitaxial CoSi2 on Si (111)A solid-phase epitaxy has been developed for the growth of CoSi2 films on Si (111) with no observable pinholes (1000/sq cm detection limit). The technique utilizes room-temperature codeposition of Co and Si in stoichiometric ratio, followed by the deposition of an amorphous Si capping layer and subsequent in situ annealing at 550-600 C. CoSi2 films grown without the Si cap are found to have pinhole densities of (1-10) x 10 to the 7th/sq cm when annealed at similar temperatures. A CF4 plasma-etching technique was used to increase the visibility of the pinholes in the silicide layer.
Document ID
19880042066
Acquisition Source
Legacy CDMS
Document Type
Reprint (Version printed in journal)
External Source(s)
Authors
Lin, T. L.
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Fathauer, R. W.
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Grunthaner, P. J.
(California Institute of Technology Jet Propulsion Laboratory, Pasadena, United States)
D'Anterroches, C.
(Southern California, University Los Angeles, CA, United States)
Date Acquired
August 13, 2013
Publication Date
March 7, 1988
Publication Information
Publication: Applied Physics Letters
Volume: 52
ISSN: 0003-6951
Subject Category
Solid-State Physics
Accession Number
88A29293
Funding Number(s)
CONTRACT_GRANT: JPL-957953
CONTRACT_GRANT: DE-AC03-76SF-00098
CONTRACT_GRANT: NSF DMR-83-0651
Distribution Limits
Public
Copyright
Other

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