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Automatic Parametric Testing Of Integrated CircuitsComputer program for parametric testing saves time and effort in research and development of integrated circuits. Software system automatically assembles various types of test structures and lays them out on silicon chip, generates sequency of test instructions, and interprets test data. Employs self-programming software; needs minimum of human intervention. Adapted to needs of different laboratories and readily accommodates new test structures. Program codes designed to be adaptable to most computers and test equipment now in use. Written in high-level languages to enhance transportability.
Document ID
19890000383
Acquisition Source
Legacy CDMS
Document Type
Other - NASA Tech Brief
Authors
Jennings, Glenn A.
(Caltech)
Pina, Cesar A.
(Caltech)
Date Acquired
August 14, 2013
Publication Date
July 1, 1989
Publication Information
Publication: NASA Tech Briefs
Volume: 13
Issue: 7
ISSN: 0145-319X
Subject Category
Mathematics And Information Sciences
Report/Patent Number
NPO-16783
Accession Number
89B10383
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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