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Systolic VLSI Array for Implementing the Kalman Filter AlgorithmA method and apparatus for processing signals representative of a complex matrix/vector equation. More particularly, signals representing an orderly sequence of the combined matrix and vector equation, known as a Kalman filter algorithm, are processed in real time in accordance with the principles of this invention. The Kalman filter algorithm is rearranged into a Faddeeva algorithm, which is a matrix-only algorithm that is modified to represent both the matrix and vector portions of the Kalman filter algorithm. The modified Faddeeva algorithm is embodied into electrical signals which are applied as inputs to a systolic array processor. The processor performs triangulation and nullification on the input signals, and delivers an output signal which is a real-time solution to the input signals.
Document ID
19890019342
Acquisition Source
Headquarters
Document Type
Other - Patent
External Source(s)
NPO-17108-1-CU
Authors
Jaw J Chang
(Jet Propulsion Laboratory La Cañada Flintridge, United States)
Hen-Geul Yeh
(Jet Propulsion Laboratory La Cañada Flintridge, United States)
Date Acquired
August 13, 2013
Publication Date
April 18, 1989
Publication Information
Publisher: United States Patent and Trademark Office
Subject Category
Electronics And Electrical Engineering
Accession Number
89N28713
Funding Number(s)
CONTRACT_GRANT: NAS7-918
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
Patent
US-PATENT-4,823,299
Patent Application
US-PATENT-APPL-SN-032819
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