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Analog Delta-Back-Propagation Neural-Network CircuitryChanges in synapse weights due to circuit drifts suppressed. Proposed fully parallel analog version of electronic neural-network processor based on delta-back-propagation algorithm. Processor able to "learn" when provided with suitable combinations of inputs and enforced outputs. Includes programmable resistive memory elements (corresponding to synapses), conductances (synapse weights) adjusted during learning. Buffer amplifiers, summing circuits, and sample-and-hold circuits arranged in layers of electronic neurons in accordance with delta-back-propagation algorithm.
Document ID
19900000259
Acquisition Source
Legacy CDMS
Document Type
Other - NASA Tech Brief
Authors
Eberhart, Silvio
(Caltech)
Date Acquired
August 14, 2013
Publication Date
June 1, 1990
Publication Information
Publication: NASA Tech Briefs
Volume: 14
Issue: 6
ISSN: 0145-319X
Subject Category
Electronic Components And Circuits
Report/Patent Number
NPO-17564
Accession Number
90B10259
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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