A cache-aided multiprocessor rollback recovery schemeThis paper demonstrates how previous uniprocessor cache-aided recovery schemes can be applied to multiprocessor architectures, for recovering from transient processor failures, utilizing private caches and a global shared memory. As with cache-aided uniprocessor recovery, the multiprocessor cache-aided recovery scheme of this paper can be easily integrated into standard bus-based snoopy cache coherence protocols. A consistent shared memory state is maintained without the necessity of global check-pointing.
Document ID
19900041034
Acquisition Source
Legacy CDMS
Document Type
Conference Paper
Authors
Wu, Kun-Lung (Illinois Univ. Urbana, IL, United States)
Fuchs, W. Kent (Illinois, University Urbana, United States)