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Modular VLSI Reed-Solomon DecoderProposed Reed-Solomon decoder contains multiple very-large-scale integrated (VLSI) circuit chips of same type. Each chip contains sets of logic cells and subcells performing functions from all stages of decoding process. Full decoder assembled by concatenating chips, with selective utilization of cells in particular chips. Cost of development reduced by factor of 5. In addition, decoder programmable in field and switched between 8-bit and 10-bit symbol sizes.
Document ID
19910000426
Acquisition Source
Legacy CDMS
Document Type
Other - NASA Tech Brief
Authors
Hsu, In-Shek
(Caltech)
Truong, Trieu-Kie
(Caltech)
Date Acquired
August 14, 2013
Publication Date
September 1, 1991
Publication Information
Publication: NASA Tech Briefs
Volume: 15
Issue: 9
ISSN: 0145-319X
Subject Category
Electronic Systems
Report/Patent Number
NPO-17897
Accession Number
91B10426
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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