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A contention-based bus-control scheme for multiprocessor systemsThe authors study contention-based bus-control schemes for scheduling processors in using a bit-parallel shared bus. The protocol is designed under the requirements that each processor exhibit a random access behavior, that there be no centralized bus control in the system, and that access be granted in real time. The proposed scheme is based on splitting algorithms used in conventional contention-resolution schemes, and utilizes two-state information obtained from collision detection. Two versions of the bus-control scheme are studied. The static one resolves contentions of N requesting processors in an average of O(logW/2N) iterations, where W is the number of bits in the bit-parallel bus. An adaptive version resolves contentions in an average time that is independent of N.
Document ID
19910072072
Acquisition Source
Legacy CDMS
Document Type
Reprint (Version printed in journal)
External Source(s)
Authors
Juang, Jie-Yong
(National Taiwan University Taipei, Republic of China, United States)
Wah, Benjamin W.
(Illinois, University Urbana, United States)
Date Acquired
August 14, 2013
Publication Date
September 1, 1991
Publication Information
Publication: IEEE Transactions on Computers
Volume: 40
ISSN: 0018-9340
Subject Category
Computer Systems
Accession Number
91A56695
Funding Number(s)
CONTRACT_GRANT: NCC2-481
CONTRACT_GRANT: NSF MIP-88-10584
CONTRACT_GRANT: NSF IRI-87-09072
Distribution Limits
Public
Copyright
Other

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