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A gallium-arsenide digital phase shifter for clock and control signal distribution in high-speed digital systemsThe design, implementation, testing, and applications of a gallium-arsenide digital phase shifter and fan-out buffer are described. The integrated circuit provides a method for adjusting the phase of high-speed clock and control signals in digital systems, without the need for pruning cables, multiplexing between cables of different lengths, delay lines, or similar techniques. The phase of signals distributed with the described chip can be dynamically adjusted in eight different steps of approximately 60 ps per step. The IC also serves as a fan-out buffer and provides 12 in-phase outputs. The chip is useful for distributing high-speed clock and control signals in synchronous digital systems, especially if components are distributed over a large physical area or if there is a large number of components.
Document ID
19920057645
Acquisition Source
Legacy CDMS
Document Type
Reprint (Version printed in journal)
External Source(s)
Authors
Fouts, Douglas J.
(U.S. Naval Postgraduate School Monterey, CA, United States)
Date Acquired
August 15, 2013
Publication Date
May 1, 1992
Publication Information
Publication: IEEE Journal of Solid-State Circuits
Volume: 27
Issue: 5 Ma
ISSN: 0018-9200
Subject Category
Electronics And Electrical Engineering
Accession Number
92A40269
Funding Number(s)
CONTRACT_GRANT: NAS7-918
Distribution Limits
Public
Copyright
Other

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