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Branch target buffer design and optimizationConsideration is given to two major issues in the design of branch target buffers (BTBs), with the goal of achieving maximum performance for a given number of bits allocated to the BTB design. The first issue is BTB management; the second is what information to keep in the BTB. A number of solutions to these problems are reviewed, and various optimizations in the design of BTBs are discussed. Design target miss ratios for BTBs are developed, making it possible to estimate the performance of BTBs for real workloads.
Document ID
19930066827
Acquisition Source
Legacy CDMS
Document Type
Reprint (Version printed in journal)
External Source(s)
Authors
Perleberg, Chris H.
(NASA Ames Research Center Moffett Field, CA, United States)
Smith, Alan J.
(California Univ. Berkeley, United States)
Date Acquired
August 16, 2013
Publication Date
April 1, 1993
Publication Information
Publication: IEEE Transactions on Computers
Volume: 42
Issue: 4
ISSN: 0018-9340
Subject Category
Computer Systems
Accession Number
93A50824
Funding Number(s)
CONTRACT_GRANT: NCA2-128
CONTRACT_GRANT: NSF MIP-87-13274
CONTRACT_GRANT: NSF MIP-91-16578
Distribution Limits
Public
Copyright
Other

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