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A bit serial sequential circuitNormally a sequential circuit with n state variables consists of n unique hardware realizations, one for each state variable. All variables are processed in parallel. This paper introduces a new sequential circuit architecture that allows the state variables to be realized in a serial manner using only one next state logic circuit. The action of processing the state variables in a serial manner has never been addressed before. This paper presents a general design procedure for circuit construction and initialization. Utilizing pass transistors to form the combinational next state forming logic in synchronous sequential machines, a bit serial state machine can be realized with a single NMOS pass transistor network connected to shift registers. The bit serial state machine occupies less area than other realizations which perform parallel operations. Moreover, the logical circuit of the bit serial state machine can be modified by simply changing the circuit input matrix to develop an adaptive state machine.
Document ID
19940004339
Acquisition Source
Legacy CDMS
Document Type
Conference Paper
Authors
Hu, S.
(Idaho Univ. Moscow, ID, United States)
Whitaker, S.
(Idaho Univ. Moscow, ID, United States)
Date Acquired
August 16, 2013
Publication Date
January 24, 1990
Publication Information
Publication: The First NASA Symposium on VLSI Design
Subject Category
Electronics And Electrical Engineering
Accession Number
94N71094
Funding Number(s)
CONTRACT_GRANT: ISBE-88-038
CONTRACT_GRANT: NAGW-1406
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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