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Pass transistor implementations of multivalued logicA simple straight-forward Karnaugh map logic design procedure for realization of multiple-valued logic circuits is presented in this paper. Pass transistor logic gates are used to realize multiple-valued networks. This work is an extension of pass transistor implementations for binary-valued logic.
Document ID
19940004341
Acquisition Source
Legacy CDMS
Document Type
Conference Paper
Authors
Maki, G. (Idaho Univ. Moscow, ID, United States)
Whitaker, S. (Idaho Univ. Moscow, ID, United States)
Date Acquired
August 16, 2013
Publication Date
January 24, 1990
Publication Information
Publication: The First NASA Symposium on VLSI Design
Subject Category
Electronics And Electrical Engineering
Accession Number
94N71096
Funding Number(s)
CONTRACT_GRANT: NAGW-1406
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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IDRelationTitle19940004319Collected WorksNASA SERC 1990 Symposium on VLSI Design
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