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A unified approach to VLSI layout automation and algorithm mapping on processor arraysDevelopment of software tools for designing supercomputing systems is highly complex and cost ineffective. To tackle this a special purpose PAcube silicon compiler which integrates different design levels from cell to processor arrays has been proposed. As a part of this, we present in this paper a novel methodology which unifies the problems of Layout Automation and Algorithm Mapping.
Document ID
19940016654
Acquisition Source
Legacy CDMS
Document Type
Conference Paper
Authors
Venkateswaran, N.
(Sri Venkateswara Univ. Tirupati, India)
Pattabiraman, S.
(Sri Venkateswara Univ. Tirupati, India)
Srinivasan, Vinoo N.
(Sri Venkateswara Univ. Tirupati, India)
Date Acquired
September 6, 2013
Publication Date
January 1, 1993
Publication Information
Publication: New Mexico Univ., The Fifth NASA Symposium on VLSI Design
Subject Category
Electronics And Electrical Engineering
Accession Number
94N21127
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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