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Massively parallel neurocomputing for aerospace applicationsAn innovative hybrid, analog-digital charge-domain technology, for the massively parallel VLSI implementation of certain large scale matrix-vector operations, has recently been introduced. It employs arrays of Charge Coupled/Charge Injection Device cells holding an analog matrix of charge, which process digital vectors in parallel by means of binary, non-destructive charge transfer operations. The impact of this technology on massively parallel processing is discussed. Fundamentally new classes of algorithms, specifically designed for this emerging technology, as applied to signal processing, are derived.
Document ID
19940034865
Acquisition Source
Legacy CDMS
Document Type
Conference Paper
Authors
Fijany, Amir
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Barhen, Jacob
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Toomarian, Nikzad
(JPL Pasadena, CA, United States)
Date Acquired
August 16, 2013
Publication Date
January 1, 1993
Publication Information
Publication: In: AIAA Computing in Aerospace Conference, 9th, San Diego, CA, Oct. 19-21, 1993, Technical Papers. Pt. 2 (A94-11401 01-62)
Publisher: American Institute of Aeronautics and Astronautics
Subject Category
Computer Systems
Report/Patent Number
AIAA PAPER 93-4649
Accession Number
94A11520
Distribution Limits
Public
Copyright
Other

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