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Prototype Focal-Plane-Array Optoelectronic Image ProcessorPrototype very-large-scale integrated (VLSI) planar array of optoelectronic processing elements combines speed of optical input and output with flexibility of reconfiguration (programmability) of electronic processing medium. Basic concept of processor described in "Optical-Input, Optical-Output Morphological Processor" (NPO-18174). Performs binary operations on binary (black and white) images. Each processing element corresponds to one picture element of image and located at that picture element. Includes input-plane photodetector in form of parasitic phototransistor part of processing circuit. Output of each processing circuit used to modulate one picture element in output-plane liquid-crystal display device. Intended to implement morphological processing algorithms that transform image into set of features suitable for high-level processing; e.g., recognition.
Document ID
19950065530
Acquisition Source
Legacy CDMS
Document Type
Other - NASA Tech Brief
Authors
Fang, Wai-Chi
(Caltech)
Shaw, Timothy
(Caltech)
Yu, Jeffrey
(Caltech)
Date Acquired
August 17, 2013
Publication Date
August 1, 1995
Publication Information
Publication: NASA Tech Briefs
Volume: 19
Issue: 8
ISSN: 0145-319X
Subject Category
Electronic Systems
Report/Patent Number
NPO-18941
Accession Number
95B10371
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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