Asymmetric Switching For A PWM H-Bridge Power Circuit

Only two of four switches interrupt substantial current. An asymmetric timing scheme improves design and operation of pulse-width-modulation (PWM) H-bridge switch-and-transformer circuit. Circuit part of dc-to-dc converter or dc-to-ac inverter; in either case, output current or voltage regulated by adjusting times of opening and closing of semiconductor switches 1 through 4 to adjust durations of current pulses in primary winding of transformer.