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Performance Analysis of Multilevel Parallel Applications on Shared Memory ArchitecturesParallel programming paradigms include process level parallelism, thread level parallelization, and multilevel parallelism. This viewgraph presentation describes a detailed performance analysis of these paradigms for Shared Memory Architecture (SMA). This analysis uses the Paraver Performance Analysis System. The presentation includes diagrams of a flow of useful computations.
Document ID
20030054508
Acquisition Source
Ames Research Center
Document Type
Preprint (Draft being sent to journal)
Authors
Biegel, Bryan A.
(NASA Ames Research Center Moffett Field, CA, United States)
Jost, G.
(Computer Sciences Corp. Moffett Field, CA, United States)
Jin, H.
(NASA Ames Research Center Moffett Field, CA, United States)
Labarta J.
(Centre Europeu de Parallelism de Barcelona)
Gimenez, J.
(Centre Europeu de Parallelism de Barcelona)
Caubet, J.
(Centre Europeu de Parallelism de Barcelona)
Date Acquired
August 21, 2013
Publication Date
April 22, 2003
Subject Category
Computer Systems
Meeting Information
Meeting: International Parallel and Distributed Processing Symposium
Location: Nice
Country: France
Start Date: April 1, 2003
Funding Number(s)
CONTRACT_GRANT: NASA Order A-61812-D
CONTRACT_GRANT: DTTS59-99-D00437
Distribution Limits
Public
Copyright
Public Use Permitted.
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