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Assembly reliability of CSPs with various chiip sizes by accelerated thermal and mechanical cycling testA JPL-led chip scale package (CSP) Consortium, composed of team members representing government agencies and private companies, recently joined together to pool in-kind resources for developing the quality and reliability of chip scale packages (CSPs) for a variety of projects.
Document ID
20060033285
Acquisition Source
Jet Propulsion Laboratory
Document Type
Reprint (Version printed in journal)
External Source(s)
hdl:2014/15937
Authors
Ghaffarian, R.
Date Acquired
August 23, 2013
Publication Date
August 15, 2000
Publication Information
Publication: Chip scale package review
Distribution Limits
Public
Copyright
Other
Keywords
Chip Scale Package CSP thermal cycle fatigue solder joint reliability

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