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(abstract) A High Throughput 3-D Inner Product ProcessorA particularily challenging image processing application is the real time scene acquisition and object discrimination. It requires spatio-temporal recognition of point and resolved objects at high speeds with parallel processing algorithms. Neural network paradigms provide fine grain parallism and, when implemented in hardware, offer orders of magnitude speed up. However, neural networks implemented on a VLSI chip are planer architectures capable of efficient processing of linear vector signals rather than 2-D images. Therefore, for processing of images, a 3-D stack of neural-net ICs receiving planar inputs and consuming minimal power are required. Details of the circuits with chip architectures will be described with need to develop ultralow-power electronics. Further, use of the architecture in a system for high-speed processing will be illustrated.
Document ID
20060036605
Acquisition Source
Jet Propulsion Laboratory
Document Type
Preprint (Draft being sent to journal)
External Source(s)
Authors
Daud, Tuan
Date Acquired
August 23, 2013
Publication Date
October 7, 1996
Subject Category
Cybernetics, Artificial Intelligence And Robotics
Distribution Limits
Public
Copyright
Other
Keywords
imaging parallel processing algorithms linear vector signals
recognition neural networks VLSI chips analog-digital hybrids 2-D imaging 3-D
image processing scene acquisition object discrimination spatio-temporal

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