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Design of a Low-Light-Level Image Sensor with On-Chip Sigma-Delta Analog-to- Digital ConversionThe design and projected performance of a low-light-level active-pixel-sensor (APS) chip with semi-parallel analog-to-digital (A/D) conversion is presented. The individual elements have been fabricated and tested using MOSIS* 2 micrometer CMOS technology, although the integrated system has not yet been fabricated. The imager consists of a 128 x 128 array of active pixels at a 50 micrometer pitch. Each column of pixels shares a 10-bit A/D converter based on first-order oversampled sigma-delta (Sigma-Delta) modulation. The 10-bit outputs of each converter are multiplexed and read out through a single set of outputs. A semi-parallel architecture is chosen to achieve 30 frames/second operation even at low light levels. The sensor is designed for less than 12 e^- rms noise performance.
Document ID
20060038707
Acquisition Source
Jet Propulsion Laboratory
Document Type
Conference Paper
External Source(s)
Authors
Mendis, Sunetra K.
Pain, Bedabrata
Nixon, Robert H.
Fossum, Eric R.
Date Acquired
August 23, 2013
Publication Date
February 1, 1993
Subject Category
Electronics And Electrical Engineering
Distribution Limits
Public
Copyright
Other

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