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VLSI design of turbo decoder for integrated communication system on a chip applicationsA high-throughput low-power turbo decoder core has been developed for integrated communication system applications such as satellite communications, wireless LAN, digital TV, cable modem, Digital Video Broadcast (DVB), and xDSL systems. The turbo decoder is based on convolutional constituent codes, which outperform all other Forward Error Correction techniques. This turbo decoder core is parameterizable and can be modified easily to fit any size for advanced communication system-on-chip products. The turbo decoder core provides Forward Error Correction of up to 15 Mbits/sec on a 0.13-micron CMOS FPGA prototyping chip at a power of 0.1 watts.
Document ID
20060043836
Acquisition Source
Jet Propulsion Laboratory
Document Type
Conference Paper
External Source(s)
Authors
Fang, Wai-Chi
Sethuram, Ashwin
Belevi, Kemal
Date Acquired
August 23, 2013
Publication Date
May 23, 2003
Subject Category
Communications And Radar
Meeting Information
Meeting: IEEE International Symposium on Circuits and Systems
Location: Bangkok
Country: Thailand
Start Date: May 23, 2003
Distribution Limits
Public
Copyright
Other
Keywords
turbo decoder
Very Large-Scale Integration (VLSI) Design
system on a chip

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