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Frequency Dependence of Single-Event Upset in Highly Advanced PowerPC MicroprocessorsSingle-event upset effects from heavy ions were measured for Motorola silicon-on-insulator (SOI) microprocessor with 90 nm feature sizes at three frequencies of 500, 1066 and 1600 MHz. Frequency dependence of single-event upsets is discussed. The results of our studies suggest the single-event upset in registers and D-Cache tend to increase with frequency. This might have important implications for the overall single-event upset trend as technology moves toward higher frequencies.
Document ID
20070032858
Acquisition Source
Jet Propulsion Laboratory
Document Type
Preprint (Draft being sent to journal)
External Source(s)
hdl:2014/40260
Authors
Irom, Farokh (Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Farmanesh, Farhad (Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
White, Mark (Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Kouba, Coy K. (NASA Johnson Space Center Houston, TX, United States)
Date Acquired
August 23, 2013
Publication Date
September 1, 2006
Subject Category
Electronics And Electrical Engineering
Report/Patent Number
PA-5 135
Meeting Information
Meeting: IEEE Transaction on Nuclear Science, RADECS 2006 Workshop
Location: Athens
Country: Greece
Start Date: September 1, 2006
Sponsors: Institute of Electrical and Electronics Engineers
Distribution Limits
Public
Copyright
Other
Keywords
Cyclotron
heavy ions
silicon on insulators
microprocessors
single event effects
single event transient,
single event upset

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