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Evaluation of the Telecommunications Protocol Processing Subsystem Using Reconfigurable Interoperable Gate ArrayThe current implementation of the Telecommunications Protocol Processing Subsystem Using Reconfigurable Interoperable Gate Arrays (TRIGA) is equipped with CFDP protocol and CCSDS Telemetry and Telecommand framing schemes to replace the CPU intensive software counterpart implementation for reliable deep space communication. We present the hardware/software co-design methodology used to accomplish high data rate throughput. The hardware CFDP protocol stack implementation is then compared against the two recent flight implementations. The results from our experiments show that TRIGA offers more than 3 orders of magnitude throughput improvement with less than one-tenth of the power consumption.
Document ID
20080013208
Acquisition Source
Jet Propulsion Laboratory
Document Type
Preprint (Draft being sent to journal)
External Source(s)
Authors
Pang, Jackson
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Liddicoat, Albert
(California Polytechnic State Univ. San Luis Obispo, CA, United States)
Ralston, Jesse
(California Polytechnic State Univ. San Luis Obispo, CA, United States)
Pingree, Paula
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Date Acquired
August 24, 2013
Publication Date
April 19, 2006
Subject Category
Space Communications, Spacecraft Communications, Command And Tracking
Meeting Information
Meeting: CoolChips IX
Location: Yokohama
Country: Japan
Start Date: April 19, 2006
End Date: April 21, 2006
Distribution Limits
Public
Copyright
Other
Keywords
protocol processing hardware
deep space telemetry
File Delivery Protocol (FDP)
reconfigurable hardware

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