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TRIGA: Telecommunications Protocol Processing Subsystem Using Reconfigurable Interoperable Gate ArraysWe present the Telecommunications protocol processing subsystem using Reconfigurable Interoperable Gate Arrays (TRIGA), a novel approach that unifies fault tolerance, error correction coding and interplanetary communication protocol off-loading to implement CCSDS File Delivery Protocol and Datalink layers. The new reconfigurable architecture offers more than one order of magnitude throughput increase while reducing footprint requirements in memory, command and data handling processor utilization, communication system interconnects and power consumption.
Document ID
20100037772
Acquisition Source
Jet Propulsion Laboratory
Document Type
Conference Paper
External Source(s)
hdl:2014/41655
Authors
Pang, Jackson (Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Pingree, Paula J. (Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Torgerson, J. Leigh (Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Date Acquired
August 25, 2013
Publication Date
July 1, 2006
Subject Category
Space Communications, Spacecraft Communications, Command And Tracking
Meeting Information
Meeting: SMC-IT
Location: Pasadena, CA
Country: United States
Start Date: July 1, 2006
Distribution Limits
Public
Copyright
Other
Keywords
protocol processing hardware engine
Telecommunications protocol processing subsystem using Reconfigurable
Interoperable Gate Arrays (TRIGA)
File Delivery Protocol (CFDP)

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