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Users Guide on Scaled CMOS Reliability: NASA Electronic Parts and Packaging (NEPP) Program Office of Safety and Mission AssuranceReliability of advanced CMOS technology is a complex problem that is usually addressed from the standpoint of specific failure mechanisms rather than overall reliability of a finished microcircuit. A detailed treatment of CMOS reliability in scaled devices can be found in Ref. 1; it should be consulted for a more thorough discussion. The present document provides a more concise treatment of the scaled CMOS reliability problem, emphasizing differences in the recommended approach for these advanced devices compared to that of less aggressively scaled devices. It includes specific recommendations that can be used by flight projects that use advanced CMOS. The primary emphasis is on conventional memories, microprocessors, and related devices.
Document ID
20120001663
Acquisition Source
Jet Propulsion Laboratory
Document Type
Other
External Source(s)
Authors
White, Mark
Cooper, Mark
Johnston, Allan
Date Acquired
August 25, 2013
Publication Date
November 1, 2011
Report/Patent Number
JPL-Publ-11-12
Distribution Limits
Public
Copyright
Other
Keywords
Scaled CMOS
Reliability
Scaling

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