Characterization of High-Speed IF Digitizers for Use by NASA Deep Space Network

My project primarily focused on the evaluation of several candidate converters to determine which provides the best overall performance for the needs of the DSCC Downlink Array (DDA). Of particular concern was the flatness of the gain and group delay of the converter over the Intermediate Frequency (IF) bandwidth, as excessive variation interferes with the beam forming that occurs when combining the signals from many antennas. In addition, converter nonlinearity and noise were evaluated as these could limit the DDA's ability to resolve weak signals, particularly in the presence of large interferers. The sensitivity of the noise at the output of the converters due to noise in the power supplies and jitter in the analog-to-digital converters (ADC) and the reference clock were also evaluated. Specifically, I worked with various high speed (1280 to 2000 megahertz sampling clock) ADCs.