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A single VLSI chip for computing syndromes in the (225, 223) Reed-Solomon decoderA description of a single VLSI chip for computing syndromes in the (255, 223) Reed-Solomon decoder is presented. The architecture that leads to this single VLSI chip design makes use of the dual basis multiplication algorithm. The same architecture can be applied to design VLSI chips to compute various kinds of number theoretic transforms.
Document ID
19870005907
Acquisition Source
Legacy CDMS
Document Type
Reprint (Version printed in journal)
Authors
Hsu, I. S. (Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Truong, T. K. (Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Shao, H. M. (Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Deutsch, L. J. (Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Date Acquired
September 5, 2013
Publication Date
November 15, 1986
Publication Information
Publication: The Telecommunications and Data Acquisition Report
Subject Category
Electronics And Electrical Engineering
Accession Number
87N15340
Funding Number(s)
PROJECT: RTOP 310-30-70-84-08
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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