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Single-Event Transient Testing of Low Dropout PNP Series Linear Voltage RegulatorsAs demand for high-speed, on-board, digital-processing integrated circuits on spacecraft increases (field-programmable gate arrays and digital signal processors in particular), the need for the next generation point-of-load (POL) regulator becomes a prominent design issue. Shrinking process nodes have resulted in core rails dropping to values close to 1.0 V, drastically reducing margin to standard switching converters or regulators that power digital ICs. The goal of this task is to perform SET characterization of several commercial POL converters, and provide a discussion of the impact of these results to state-of-the-art digital processing IC through laser and heavy ion testing
Document ID
20140000671
Acquisition Source
Jet Propulsion Laboratory
Document Type
Other
Authors
Adell, Philippe
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Allen, Gregory
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Date Acquired
February 11, 2014
Publication Date
January 1, 2013
Subject Category
Electronics And Electrical Engineering
Report/Patent Number
JPL-Publ-13-7
Funding Number(s)
CONTRACT_GRANT: NAS7-03001
WBS: WBS 40.49.03.07
WBS: WBS 724297.40.49.11
Distribution Limits
Public
Copyright
Public Use Permitted.
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