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Simple circuit performs binary addition and subtractionRipple adder reduces the number of logic circuits required to preform binary addition and subtraction. The adder uses dual input and delayed output flip-flops in one register. The contents of this register are summed with those of a standard register through conventional AND/gates.
Document ID
19650000353
Acquisition Source
Legacy CDMS
Document Type
Other - NASA Tech Brief
Authors
Cliff, R. A.
Schaefer, D. H.
Date Acquired
August 2, 2013
Publication Date
November 1, 1965
Subject Category
Electronic Components And Circuits
Report/Patent Number
GSC-399
Report Number: GSC-399
Accession Number
65B10355
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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