NASA Logo

NTRS

NTRS - NASA Technical Reports Server

Collections About News Help Login

Press Enter or click the Search button to begin your search.

Back to Results
Redundancy approaches in bubble domain memoriesFabrication of integrated circuit chips to compensate for faulty memory elements is discussed. Procedure for testing chips to determine extent of redundancy and faults is described. Mathematical model to define operation is presented. Schematic circuit diagram of test equipment is provided.
Document ID
19720000642
Acquisition Source
Legacy CDMS
Document Type
Other - NASA Tech Brief
Authors
Almasi, G. S. (IBM)
Schuster, S. E. (IBM)
Date Acquired
August 6, 2013
Publication Date
October 1, 1972
Subject Category
Electronic Components And Circuits
Report/Patent Number
MFS-21915
Report Number: MFS-21915
Accession Number
72B10643
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

Related Records

There are no records associated with this record.
No Preview Available