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DALG: A program for test pattern generation in combinational logical circuitsA user's manual for a computer program DALG which generates test patterns for detecting faults in combinational logic circuits containing up to 200 logical gates is presented. The gates may be of logical types AND, OR, NAND, NOR, NOT, or Exclusive OR is presented. The faults may be any one gate or input struck at a fixed value (0 or 1). In addition to test pattern generation DALG will also determine whether or not the given test pattern will detect given faults in a circuit. Sample problems are given along with input data sheets and printed output to illustrate the capabilities of the program.
Document ID
19720004468
Acquisition Source
Legacy CDMS
Document Type
Contractor Report (CR)
Date Acquired
September 2, 2013
Publication Date
November 15, 1971
Subject Category
Computers
Report/Patent Number
NASA-CR-124571
JPL-TM-33-516
Report Number: NASA-CR-124571
Report Number: JPL-TM-33-516
Accession Number
72N12117
Funding Number(s)
CONTRACT_GRANT: NAS7-100
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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