Design, fabrication, testing and delivery of a feasibility model laminated ferrite memory

The effect of using multiword addressing with laminated ferrite arrays was made. Both a reduction in the number of components, and a reduction in power consumption was obtained for memory capacities between one million bits and one million words. An investigation into the effect of variations in the processing steps resulted in a number of process modifications that improved the quality of the arrays. A feasibility model laminated ferrite memory system was constructed by modifying a commercial plated wire memory system to operate with laminated ferrite arrays. To provide flexibility for the testing of the laminated ferrite memory, an exerciser has been constructed to automatically control the loading and recirculation of arbitrary size checkerboard patterns of one's and zero's and to display the patterns of stored information on a CRT screen.