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Digital second-order phase-locked loopActual tests with second-order digital phase-locked loop at simulated relative Doppler shift of 1x0.0001 produced phase lock with timing error of 6.5 deg and no appreciable Doppler bias. Loop thus appears to achieve subcarrier synchronization and to remove bias due to Doppler shift in range of interest.
Document ID
19740000274
Acquisition Source
Legacy CDMS
Document Type
Other - NASA Tech Brief
Authors
Holmes, J. K.
Carl, C. C.
Tagnelia, C. R.
Date Acquired
August 7, 2013
Publication Date
January 1, 1975
Subject Category
Electronic Components And Circuits
Report/Patent Number
NPO-11905
Report Number: NPO-11905
Accession Number
74B10274
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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