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Interface control scheme for computer high-speed interface unitControl scheme is general and performs for multiplexed and dedicated channels as well as for data-bus interfaces. Control comprises two 64-pin, dual in-line packages, each of which holds custom large-scale integrated array built with silicon-on-sapphire complementary metal-oxide semiconductor technology.
Document ID
19750000036
Acquisition Source
Legacy CDMS
Document Type
Other - NASA Tech Brief
Authors
Ballard, B. K. (RCA)
Date Acquired
August 8, 2013
Publication Date
April 1, 1975
Subject Category
Electronic Components And Circuits
Report/Patent Number
MFS-23083
Report Number: MFS-23083
Accession Number
75B10036
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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