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Main memory unitThe development of a main memory unit (MMU) for the space ultrareliable module computer (SUMC) model HTC is discussed. The design, fabrication, and test of basic memory modules (BMM) which were to be used in the design and construction of the MMU are described. The BMM was designed from state-of-the-art technologies which included large scale integration devices mounted and interconnected on a substrate to form a functional module to be utilized in the MMU development. A SUMC memory system design study is discussed which addressed itself to the BMM design and analysis to be conducted to determine the most efficient organization of the BMM in order to establish such modularity features as: word length expandability without redesign, high reliability, and fault tolerance. One MMU was designed, fabricated, tested, and delivered which will be electrical and mechanically compatible with the hybrid technology computer (HTC) model of the SUMC family of computers. The MMU will contain a storage capacity of 8196 36 bit words which includes a parity bit for each 8 bit byte of data.
Document ID
19750013909
Acquisition Source
Legacy CDMS
Document Type
Contractor Report (CR)
Date Acquired
September 3, 2013
Publication Date
April 15, 1975
Subject Category
Computer Operations And Hardware
Report/Patent Number
NASA-CR-120733
IBM-75W-000
Report Number: NASA-CR-120733
Report Number: IBM-75W-000
Accession Number
75N21981
Funding Number(s)
CONTRACT_GRANT: NAS8-30460
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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