Gate-controlled-diodes in silicon-on-sapphire: A computer simulation

The computer simulation of the electrical behavior of a Gate-Controlled Diode (GCD) fabricated in Silicon-On-Sapphire (SOS) was described. A procedure for determining lifetime profiles from capacitance and reverse current measurements on the GCD was established. Chapter 1 discusses the SOS structure and points out the need of lifetime profiles to assist in device design for GCD's and bipolar transistors. Chapter 2 presents the one-dimensional analytical formula for electrostatic analysis of the SOS-GCD which are useful for data interpretation and setting boundary conditions on a simplified two-dimensional analysis. Chapter 3 gives the results of a two-dimensional analysis which treats the field as one-dimensional until the silicon film is depleted and the field penetrates the sapphire substrate. Chapter 4 describes a more complete two-dimensional model and gives results of programs implementing the model.