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A complementary MOS processThe complete sequence used to manufacture complementary metal oxide semiconductor (CMOS) integrated circuits is described. The fixed-gate array concept is presented as a means of obtaining CMOS integrated circuits in a fast and reliable fashion. Examples of CMOS circuits fabricated by both the conventional method and the fixed-gate array method are included. The electrical parameter specifications and characteristics are given along with typical values used to produce CMOS circuits. Temperature-bias stressing data illustrating the thermal stability of devices manufactured by this process are presented. Results of a preliminary study on the radiation sensitivity of circuits manufactured by this process are discussed. Some process modifications are given which have improved the radiation hardness of our CMOS devices. A formula description of the chemicals and gases along with the gas flow rates is also included.
Document ID
19770012378
Acquisition Source
Legacy CDMS
Document Type
Other - NASA Technical Report (TR)
Authors
Jhabvala, M. D.
(NASA Goddard Space Flight Center Greenbelt, MD, United States)
Date Acquired
September 3, 2013
Publication Date
March 1, 1977
Subject Category
Electronics And Electrical Engineering
Report/Patent Number
G-7702-F7
NASA-TR-R-470
Report Number: G-7702-F7
Report Number: NASA-TR-R-470
Accession Number
77N19322
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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