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Field effect transistor and method of construction thereofA field effect transistor is constructed by placing a semi-conductor layer on an insulating substrate so that the gate region is separated from source and drain regions. The gate electrode and gate region of the layer are of generally reduced length, the gate region being of greatest length on its surface closest to the gate electrode. This is accomplished by initially creating a relatively large gate region of one polarity, and then reversing the polarity of a central portion of this gate region by ion bombardment, thus achieving a narrower final gate region of the stated configuration.
Document ID
19780019383
Acquisition Source
Legacy CDMS
Document Type
Other - Patent
Authors
Fletner, W. R.
(NASA Marshall Space Flight Center Huntsville, AL, United States)
Date Acquired
September 3, 2013
Publication Date
May 9, 1978
Subject Category
Electronics And Electrical Engineering
Report/Patent Number
Patent Application Number: US-PATENT-APPL-SN-699012
Patent Number: NASA-CASE-MFS-23312-1
Patent Number: US-PATENT-4,087,902
Accession Number
78N27326
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
Patent
NASA-CASE-MFS-23312-1|US-PATENT-4,087,902
Patent Application
US-PATENT-APPL-SN-699012
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