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Time delay and integration array (TDI) using charge transfer device technology. Phase 2, volume 1: TechnicalThe 20x9 TDI array was developed to meet the LANDSAT Thematic Mapper Requirements. This array is based upon a self-aligned, transparent gate, buried channel process. The process features: (1) buried channel, four phase, overlapping gate CCD's for high transfer efficiency without fat zero; (2) self-aligned transistors to minimize clock feedthrough and parasitic capacitance; and (3) transparent tin oxide electrode for high quantum efficiency with front surface irradiation. The requirements placed on the array and the performance achieved are summarized. This data is the result of flat field measurements only, no imaging or dynamic target measurements were made during this program. Measurements were performed with two different test stands. The bench test equipment fabricated for this program operated at the 8 micro sec line time and employed simple sampling of the gated MOSFET output video signal. The second stand employed Correlated Doubled Sampling (CDS) and operated at 79.2 micro sec line time.
Document ID
19780022578
Acquisition Source
Legacy CDMS
Document Type
Contractor Report (CR)
Date Acquired
September 3, 2013
Publication Date
October 21, 1977
Subject Category
Electronics And Electrical Engineering
Report/Patent Number
NASA-CR-156807
Report Number: NASA-CR-156807
Accession Number
78N30521
Funding Number(s)
CONTRACT_GRANT: NAS5-23629
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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